The present invention relates to fabricating a semiconductor device, and more particularly, to a transistor in a semiconductor device and a method for fabricating the same.
A typical transistor in a semiconductor device may have a single gate structure having a gate crossing an active region of a substrate. The single gate structure provides such an advantage that it is possible to reduce a transistor forming area, but it is difficult to satisfy both of characteristics of leakage current and turn-on current in the transistor at the same time since there is a trade-off relation between the leakage current characteristics and the turn-on current characteristics in the transistor. Hence, it is difficult to form a high-speed transistor with low power consumption.
To satisfy both of the leakage current characteristics and the turn-on current characteristics, a transistor having a double gate structure (hereinafter, referred to as a double gate transistor for simplicity) has been suggested, which is capable of reducing the leakage current characteristics while maintaining the turn-on characteristics of the transistor.
FIGS. 1A to 1C illustrate a typical double gate transistor. Specifically, FIG. 1A illustrates a layout view of the typical double gate transistor, FIG. 1B illustrates a cross-sectional view taken along line I-I′ of FIG. 1A, and FIG. 1C illustrates an equivalent circuit diagram of FIG. 1A.
Referring to FIGS. 1A to 1C, an active region A is defined by an isolation layer 103 formed in an isolation region F of a substrate 101. Over the active region A of the substrate 101, two gate structures, i.e., first and second gate structures 105 and 107, cross the active region A, and are spaced apart from each other by a predetermined distance. Such a structure where two gates are formed over the active region is called a double gate structure.
Source/drain junction regions (not shown) are provided in the substrate 101 at both sides of the first and second gate structures 105 and 107. Referring to FIG. 1A, the source/drain junction regions are connected to a bit line or a storage electrode through source/drain contacts C which are spaced apart from each other by a predetermined interval. Such a double gate transistor may provide an advantage of improvement in leakage current characteristics since it has one more gate compared to a single gate transistor. The double gate transistor, however, cannot meet an ongoing demand for high-integration of semiconductor devices because the transistor requires a large forming area.